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portada Manual de Vhdl: Síntesis Lógica Para Plds (in Spanish)
Type
Physical Book
Author
Publisher
Collection
ingeniería
Year
2006
Language
Spanish
Pages
236
Format
Paperback
ISBN13
9788498300116
Edition No.
2
Categories

Manual de Vhdl: Síntesis Lógica Para Plds (in Spanish)

Javier García Zubía (Author) · Universidad De Deusto · Paperback

Manual de Vhdl: Síntesis Lógica Para Plds (in Spanish) - Javier García Zubía

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Origin: Argentina (Import costs included in the price)
It will be shipped from our warehouse between Friday, May 24 and Friday, June 07.
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Synopsis "Manual de Vhdl: Síntesis Lógica Para Plds (in Spanish)"

El lector tiene un libro que le enseñará de una forma práctica a utilizar el VHDL y a implementar estos diseños en CPLDs y FPGAs de la empresa Xilinx. El desarrollo del libro tie ne como hilo conductor a los ejercicios, cuyos planteamientos dan pie a un uso cada vez más potente del VHDL.

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The book is written in Español.

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